Semiconductor DRAMs are typically formed of rowlines and columns crossing the rowlines. Capacitors adjacent each crossing of the rowlines and columns store charge, designating the data to be stored, and are switched to the columns in order to receive or discharge charge upon receipt of an appropriate voltage on the rowlines. The rowlines and columns are selected so as to read and write to particular capacitors by means of row (or X) decoders and column (or Y) decoders.
There are sometimes physical faults associated with the columns or associated elements. For this reason DRAMs usually contain redundant (spare) columns, which involves the provision of extra memory elements and column circuitry (columns). The extra memory and required redundant decoders to access that memory in place of defective columns uses valuable semiconductor chip area and decreases the efficiency of the memory.